The miniaturization of components has been an enormously strong economic driver over the last 50 years. Current micro-engineering manufacturing methods employed for semiconductors allow complex multi-material systems that are created using planar methods of construction. Materials are often added in sequence with many process steps being required for exposing resists, depositing oxides or etching surface patterns. The results are quite spectacular: micro-systems manufacturers have provided the world with an incredible array of gadgets and high performance computer chips. The drawback to these manufacturing routes is not performance but cost. Huge economies of scale are needed for cost reduction which in turn means that typical Silicon fabrication plants can cost up $5 billion, with a very hefty operational budget. The entry costs are high and the associated technologies are not available to the wider manufacturing community which ultimately limits the number of manufacturing enterprises in this sector. In addition current micro-systems are very much built on planar landscapes, they are inherently 2D and only take advantage of the third dimension through via-holes that enable 2.5D interconnectivity.